View EP3C120_165467.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Cyclone III FPGA Family
www..com
ES-01020-2.0
Errata Sheet
Introduction
This errata sheet provides updated information on Cyclone(R) III devices. This document addresses known device issues and includes methods to work around the issues. Table 1 shows the specific issues and which Cyclone III devices each issue affects.
Table 1. Cyclone III FPGA Family Issue Issue Affected Devices Solution
For a solution, refer to "MSEL Pin Connection".
MSEL pins may be sensed at a different setting All Cyclone III devices than was intended if connected to VC C I O for logic high and VC C I O sags below 0.75 V after power on reset and before configuration starts. Momentary current surge from the VCCINT supply after configuration. EP3C25 ES Revision B and C EP3C120 ES Revision A
Fixed in EP3C25 Revision D, EP3C120 ES Revision B and EP3C120 Revision C
Issue with static current in I/O banks powered at 3.3-V VC C I O . The affected devices might draw more current than expected.
Fixed in EP3C25 Revision D and EP3C120 Revision EP3C120 ES Revision A and B C
EP3C25 ES Revision B and C
MSEL Pin Connection
Altera has identified an issue with Cyclone III MSEL pins connected to VCCIO for logic high. If VCCIO sags below 0.75 V after power on reset and before configuration starts, the MSEL pins may be sensed at a different setting than was intended. The device might then require a power cycle to recover. This issue does not occur when the device is in user mode or when configuration has started.
Solution
Connect MSEL pins to VCCA for a logic high. If VCCA sags below the device's POR trip point then the POR circuit will reset the device. If you have already connected the MSEL pins to VCCIO on your board, make sure that VCCIO rises monotonically to its recommended operating condition voltage level and stays within the voltage min and max. A monotonic rise will prevent the issue from occurring.
Altera Corporation July 2007
1 Preliminary
Cyclone III FPGA Family
Configuration Transition www..com Current Issue
Cyclone III EP3C25 ES Revision B and C and EP3C120 ES Revision A devices might exhibit a momentary current surge from the VCCINT supply after configuration. If your system's VCCINT supply does not provide this current, the Cyclone III device might not transition into user mode as intended. This issue will be fixed in all production devices. While the size of the current surge is dependent on your design and on Quartus II placement and routing, the following currents are maximums for each device.
Table 2. Transition Current Device
EP3C25 EP3C120
Peak Current from VCCINT Supply During Transition
600mA 3A
If you use JTAG for initialization, the duration of the current surge is a maximum of 74 TCK clock periods. If you use the CLKUSR pin for initialization, the duration of the current surge is a maximum of 74 CLKUSR clock periods. Otherwise, the duration of the current surge is a maximum of 15s. The fastest rise time within the surge is 150ns.
Workaround
To ensure VCCINT voltage level stability during the transition from configuration mode to user mode, the system needs to supply the peak transition current. Table 3 lists the maximum VCCINT supply impedance allowed to meet the current surge while maintaining voltage level stability. Additionally, Table 3 lists typical capacitors, along with a voltage regulator, that can produce a VCCINT supply impedance that is at or lower than the maximum.
Table 3. VCCINT Supply Impedance and Typical Capacitors (Part 1 of 2) Device
EP3C25
Maximum VCCINT Supply Impedance (1), (2)
0.25
Typical VCCINT Capacitor (3)
100 F low ESR tantalum and 10 F ceramic
2 Preliminary
Altera Corporation
3.3-V I/O Power Static Current Issue
Table 3. VCCINT Supply Impedance and Typical Capacitors (Part 2 of 2)
www..com
Device
EP3C120 Notes to Table 3:
(1) (2) (3)
Maximum VCCINT Supply Impedance (1), (2)
0.05
Typical VCCINT Capacitor (3)
470 F low ESR tantalum and 100 F ceramic
Impedances as listed result in a VCCINT drop of no more than 150mV. Impedance is over the range of DC to 2.4MHz. Minimum capacitors at one each per Cyclone III device to meet the transition current surge. Normal user mode operation likely requires additional bulk and decoupling capacitors.
Typically a robust VCCINT power system designed to handle Cyclone III user mode operation meets the above impedances. For example, the VCCINT power systems on the Cyclone III FPGA Starter Kit board (3C25) and the Cyclone III FPGA Development Kit board (3C120) are below the maximum impedances.
3.3-V I/O Power Static Current Issue
Altera has identified an issue with static current in I/O banks powered at 3.3-V VCCIO on Cyclone III EP3C25 Revision B and C and EP3C120 Revision A and B engineering sample devices. The affected devices might draw more current than expected as stated in Table 4. You should take the additional I/O current into consideration when designing the VCCIO power system on your board. This issue does not affect I/O banks powered at 3.15V VCCIO or below.
Table 4. Additional I/O Current Device
EP3C25 EP3C120 Note to Table 4:
(1)
Note (1) Maximum Increase of ICCIO Per I/O Bank Powered at 3.3-V VCCIO
8 mA 15mA
This current increase per 3.3-V I/O bank is in addition to the existing power estimations shown in the PowerPlay Early Power Estimator or Quartus II PowerPlay Power Analyzer tools.
This issue will be fixed in production silicon for the EP3C25 Revision D and EP3C120 Revision C and their later revisions.
Revision History
Altera Corporation
The following is the revision history for this errata:
3 Preliminary
Cyclone III FPGA Family
Version 1.0
www..com
Initial release.
Version 2.0
The following changes were made to the Cyclone III FPGA Family Errata Sheet version 2.0:

Added "Configuration Transition Current Issue" on page 2. Added "3.3-V I/O Power Static Current Issue" on page 3.
101 Innovation Drive San Jose, CA 95134 www.altera.com Applications Hotline: (800) 800-EPLD Literature Services: literature@altera.com
Copyright (c) 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
4 Preliminary
Altera Corporation

▲Up To Search▲

Price & Availability of EP3C120

	To Download EP3C120 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .